Power Integrity Engineer

Job Details:
Job Description: 

Your responsibilities will be, but are not limited to:

• Delivers Power Integrity solutions for large, complex highspeed platforms, boards, packages, and silicon.
• Develops and analyzes power delivery networks including 2D and 3D model extraction and noise analysis across die/C4 bumps, silicon, package, sockets, and boards.
• Defines power grid specification and power and area targets to achieve the best balance of Power Integrity and performance.
• Develops test structures, electrical analysis methodology and verification plans to address challenges.
• Performs measurements to characterize power noise profile across frequency, ground bounce, and other key metrics to verify power delivery network after design and correlate back to presilicon analysis/estimations.
• Applies knowledge of Power Integrity design and tradeoffs to perform simulations of power network, guide package, and platform physical implementation.
• Ensures that ondie power noise meets SoC and other key platform ingredient functionality and performance.
• Develops and delivers platform level power shapes and decoupling solutions as part of the platform design guide to the end customers.
• Derives platform level specifications from silicon specifications, ensures package/platform pathfinding to converge on feature set/form factor, and VR performance characterization.
• Collaborates with the silicon integration team, die floor planners, and package design team to optimize the ondie decoupling partitions and implement the package decoupling scheme and voltage regulation for package/die.

Qualifications:

Minimum Qualifications,
You must possess the below minimum qualifications to be initially considered for this position:

• Candidate must possess a bachelor's or master's degree in electrical engineering, mechatronic engineering, or related STEM field (documentation related to bachelor's degree completion will be required).
• 2+ years of experience working with either of the following: Power electronics, Signal Integrity, Voltage regulator design/testing, PCB Modeling, simulations and/or testing.
• Intermediate to advanced English level.

Preferred Qualifications,
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates:

• Experience with Printed Circuit Boards (PCB) and Packaging Technology.
• Experience with either of the following tools: High-speed design tools and 3D extraction tools (i.e: H Spice, HFSS, ADS, Power SI/DC).
• Experience with transmission line theory and electromagnetic field concepts.

Experience listed would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

Job Type:
Experienced HireShift:
Shift 1 (Mexico)Primary Location: 
Mexico, GuadalajaraAdditional Locations:
Business group:
The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.